Since the invention of the integrated circuit, the semiconductor industry has experienced rapid growth due to improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). This improvement in integration density has come from shrinking the semiconductor process node (e.g., shrink the process node towards the sub-20 nm node). As the demand for miniaturization continues, the further shrinking of the process node may increase the complexity of fabricating integrated circuits.
An integrated circuit may comprise a variety of metal oxide semiconductor (MOS) devices. Each MOS device may comprise a substrate layer. A dielectric layer such as a layer of silicon dioxide may be formed on top of the substrate layer. Furthermore, a conductive layer such as a layer of metal or polycrystalline silicon may be deposited on top of the dielectric layer to form a gate structure of the MOS device. In addition, the MOS device may comprise a drain region and a source region. Both regions are highly doped with the same type doping, such as a p-type doping or an n-type doping. Both regions are further connected to two metal contacts to form a drain terminal and a source terminal respectively.
The gate of a MOS device can be formed of either polycrystalline silicon or metal. As semiconductor technologies evolve, MOS devices having a metal gate structure have emerged as an effective solution to further improve the performance of MOS devices. For example, the metal gate structure can reduce the resistance of a gate terminal so as to improve the propagation delay when a gate signal passes through the gate terminal. A variety of metal materials such as tantalum nitride, metal carbide, tantalum, titanium and/or the like can be used to form the gate structure of MOS devices.
Various technologies can be employed to deposit metal materials to form a metal gate structure. Metal materials can be deposited on top of a dielectric layer through a chemical vapor deposition (CVD) process. Alternatively, a metal layer can be formed by a physical vapor deposition (PVD) process. During a PVD process, metal materials are sputtered or vaporized and deposited on the surface of a wafer. The PVD process mainly employs physical processes such as vacuum evaporation or plasma sputter bombardment.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.